Field of the Invention
The present invention relates to the technical field of liquid crystal displays, and more particularly to a pixel unit, a COA substrate and a liquid crystal display panel having the same.
Description of the Related Art
In a COA (Color filter On Array, where a color film layer is directly formed on an array substrate) framework, to ensure the electrical connection of two different conductive layers, such as M1 (a first metal layer)/M2 (a second metal layer), M1/ITO (an indium tin oxide layer) and M2/ITO, it is required to provide bridging holes in corresponding conductive layers; and to further ensure the bridging holes not to be covered by color resist or for ease of electrical conduction of the conductive layers (e.g., electrical conduction of M2/ITO), for each bridging hole, it is required to separately provide a color-resist opening within a region of a color resist layer corresponding to this bridging hole.
However, due to different manufacture procedures of different conductive layers and different manufacture procedures of bridging holes and color-resist openings, to ensure an overlapping ratio of bridging holes on a conductive layer and color-resist openings on a color resist layer to be within a certain range, the aperture of the color-resist opening is required to be far greater than that of the bridging holes and a single color-resist opening thus occupies a large space.
It can be seen that, since it is required to separately provide a color-resist opening hole with respect to each bridging hole and a single color-resist opening occupies a large space, the color-resist openings will occupy a large amount of space in the TFT layout design. As a result, both the space utilization and the aperture opening ratio of a TFT (Thin Film Transistor) region are reduced.
For example, as shown in FIG. 1, a pixel unit includes a color resist layer 10 and a pixel electrode 11. When there are two bridging holes in the pixel unit, i.e., a first bridging hole 101 and a second bridging hole 102, it is required to separately provide two corresponding color resist openings on the color resist layer 10, i.e., a first color resist opening 103 and a second color resist opening 104. Meanwhile, since the distance from an edge of each color resist opening to an edge of each of the bridging holes, i.e., a spacing between each of the color resist openings and each of the bridging holes, has certain requirements, that is, both a spacing d1 between the first color resist opening 103 and the first bridging hole 101 and a spacing d2 between the second color resist opening 104 and the second bridging hole 102 in FIG. 1 have certain requirements, the color resist openings in the pixel unit will occupy a large amount of space. As a result, both the space utilization and the aperture opening ratio of the TFT region are reduced.